About this Abstract |
Meeting |
2022 TMS Annual Meeting & Exhibition
|
Symposium
|
Electronic Packaging and Interconnections
|
Presentation Title |
NOW ON-DEMAND ONLY - Stress Development in Solder Interconnects under Pulsed Electric Current |
Author(s) |
Allison Theresa Osmanson, Yi Ram Kim, Mohsen Tajedini, Choong-Un Kim, Patrick Thompson, Qiao Chen, Sylvester Ankamah-Kusi |
On-Site Speaker (Planned) |
Allison Theresa Osmanson |
Abstract Scope |
The theoretical mechanism behind the stress effect on electromigration (EM) in solder interconnects integrated in wafer-level chip scale packages (WCSPs) is investigated in this study. This research is spurred by our recent findings suggesting that the failure which occurs in the device under test (DUT) in pulsed-DC conditions is assisted by thermal fatigue. This conclusion was deduced from samples tested under varying duty factors (DF) of low-frequency pulsed-DC conditions, which were then subjected to cross-sectional analysis. Samples tested under high DF conditions had the shortest mean-time-to-failure. A crack was also observed along the solder bump/under-bump metallization (UBM) interface, suggesting that significant plastic deformation, dislocation gliding, and strain hardening occurs with fluctuating temperature and stress during pulse “on”/“off” cycles, leading to thermal fatigue and thus enhancing EM failure. The finite element method (FEM) of the thermal fatigue mechanism which occurs in pulsed-DC conditions is implemented and presented in this study. |
Proceedings Inclusion? |
Planned: |
Keywords |
Electronic Materials, Computational Materials Science & Engineering, Modeling and Simulation |