Phase Stability, Phase Transformations, and Reactive Phase Formation in Electronic Materials XIX: Advanced Electronic Interconnection
Sponsored by: TMS Functional Materials Division, TMS: Alloy Phases Committee
Program Organizers: Hiroshi Nishikawa, Osaka University; Shi-Kang Lin, National Cheng Kung University; Chao-Hong Wang, National Chung Cheng University; Chih-Ming Chen, National Chung Hsing University; Jaeho Lee, Hongik University; Zhi-Quan Liu, Shenzhen Institutes of Advanced Technology; Ming-Tzer Lin, National Chung Hsing University; Dajian Li, Karlsruhe Institute of Technology; Yu Zhong, Worcester Polytechnic Institute; Yee-wen Yen, National Taiwan University of Science and Technology; Song-Mao Liang, Clausthal University of Technology; A.S.Md Abdul Haseeb, Bangladesh University of Engineering and Technology (BUET); Ligang Zhang, Central South University; Sehoon Yoo, Korea Institute of Industrial Technology
Tuesday 2:00 PM
February 25, 2020
Room: Marina Ballroom E
Location: Marriott Marquis Hotel
Session Chair: Zhi-Quan Liu, Shenzhen Institutes of Advanced Technology, CAS; Yee-Wen Yen, National Taiwan University of Science and Technology
2:00 PM Invited
Wafer Level SLID Bonding - Formation and Evolution of Microstructures: Vesa Vuorinen1; Glenn Ross1; Joseph Hotskiss1; Jani Pöllänen1; Mervi Paulasto-Kröckel1; 1Aalto University
Wafer level Solid Liquid Interdiffusion (SLID) bonding, also known as Transient Liquid-Phase (TLP) bonding, is becoming an increasingly attractive method for industrial usage since it can provide simultaneous formation of electrical interconnections and hermetic encapsulation for Micro Electro Mechanical Systems (MEMS). However, in order to ensure the functionality and reliability of the devices fundamental understanding on the formation and evolution of interconnection microstructures as well as global and local stresses is of utmost importance. In this work a low-temperature Cu-In-Sn based SLID bonding process is presented and discussed in detail. It was discovered that by introducing In as an additional alloying element to the traditional Cu-Sn metallurgy, resulting in a stabilized Cu6(Sn,In)5 phase structure, it is possible to significantly decrease the bonding temperature. The CTE induced residual stresses are minimized due to reduced process temperatures. In addition, the challenges related to the process integration and MEMS/CMOS device compatibility is rationalized.
2:30 PM Cancelled
A Transient Liquid Phase Bonding Process Using Sn/Cu Multiple Layers for Automotive Power Semiconductor: Dong-Yurl Yu1; Junhyuk Son1; Yong-Ho Ko1; Sehoon Yoo1; Dongjin Byun2; JungHwan Bang1; 1Korea Institute Of Industrial Technology; 2Korea University
In this study, TLP bonded joint for power electric module was fabricated by Sn, Cu layers using sputtering process. And then, the aging test was carried out for up to 500 hours for high temperature reliability. The interfacial reaction behaviors and the mechanical properties of Cu6Sn5 and Cu3Sn TLP bonded joints were compared. At first, the bonding joint of all layer conditions was fully converted to the Cu6Sn5 IMCs and Cu3Sn IMCs layers IMCs. After 500 hours, all bonding joints were changed to Cu3Sn IMC. Shear strength of 5layers/ 5layers was the highest among the three layer conditions at initial condition because of island type Cu3Sn IMC. After 500 hours, the shear strength of 3 layers was highest among the three layer conditions because void fraction was lowest among the three joins.
2:50 PM
Interfacial Stability between High-temperature Lead-free Solders and Substrates: Shih-kang Lin1; Chih-han Yang1; Ming-yueh Tsai1; Bo-hsun Hsu1; 1Department of Materials Science and Engineering, National Cheng Kung University
High-temperature interconnection materials have been widely used in for high-power electronics. Conventionally, high lead (Pb) is popularly used in consumer electronic products but harmful to the environment and human health. The high-temperature Pb-free solders search became a significant issue. Gold (Au)-based alloy is a suitable material because of its suitable melting point and excellent thermal and electronic conductivities. However, Au is very expensive and only can be applied in niche applications. In this study, we will present interfacial stability of the Au-based high-temperature lead-free solders. Also, high throughput calculations were conducted using the PANDAT software in console mode to search for the new ternary or higher order systems. In a few millions of point calculations, we will purpose other high-temperature interconnection materials that are more economically scalable for consumer electronics.
3:10 PM
Microstructure of Cu/Cu Joints using Sn-Coated Cu Particle Paste for High-temperature Application: Hiroshi Nishikawa1; Xiangdong Liu1; 1Osaka University
To assemble power modules for high-temperature application, the high temperature packaging technology such as a die attach process has been required. As a die attach process, we focus on a transient liquid phase (TLP) bonding, which can be operated at a low temperature while resulting in higher re-melting temperatures of bonded joints. However, some drawbacks of this technology still remain. For example, the duration of this process is too long, up to a few hours, and multiple hours of annealing are required to achieve a thermodynamically stable joint. In this time, we evaluate the microstructure of the joints using Sn-coated Cu particles and the bonding strength of the joints. A thermally stable joint fully comprising Cu3Sn phase with a dispersion of Cu particles could be obtained after sintering for 30 s at 300 ℃ under a formic acid atmosphere. The shear strength of the joint was about 25 MPa.
3:30 PM Break
3:50 PM Cancelled
Fabrication of Highly Reliable Joint Based on Cu@Ni@Sn Double-layer Powder for High Temperature Application: Ju Xu1; Hongyan Xu1; 1Institute of Electrical Engineering, Chinese Academy of Sciences
A highly reliable three-dimensional network structure leadless joint was fabricated based on Cu@Ni@Sn core-shell powder and transient liquid phase bonding (TLPB) technology for high temperature electronic devices packaging application. Cu@Ni@Sn double-layered core/shell structured microparticles with different Sn and Ni layer thickness were fabricated and compressed as preform, which were utilized to form joint by TLPB process. The microstructure and phase composition evolution for Cu@Sn and Cu@Ni@Sn joint system were comparatively studied after reflowing and aging process. Different preform surface treatment methods using one time pressing and sputtering process were made, the related interfacial microscopic morphology between preform and substrate was analyzed and compared. Results indicated that Cu@Ni@Sn bondline have lower void rate and higher shear strength than that of Cu@Sn. The mechanism shows that Sn coating layer was completely consumed to form (Cu,Ni)6Sn5/Ni3Sn4 IMCs, and the resulting Ni3Sn4 interfacial layer inhibit Cu atom diffusing towards Cu6Sn5 to form Cu3Sn. This is the main reason for the three-dimensional network structure joint based on Cu@Ni@Sn double-layer powder can be used reliable under high temperature.
4:20 PM
Investigation of Metal Filament Formation: Chung-Yu Chiu1; Cheng-Yi Liu1; 1National Central University
Lead frame is an important medium for connecting chip and printed circuit board. However, during lead frame manufacturing, filaments might be formed at the edge of burr side after stamping process. The residual filaments on the lead frame would bring about electrical short and further cause device disable. The reason of filament formation is partial loosen of burr which have intensive relation with bur height. The height of burr would be influenced by several factors such as hardness, grain size, punch shape, stamping force and so on. We thought that properties of bulk copper might have the most influential to burr height. In this study, electroplated nickel layer were used to simulate the lead frame manufacture process. By changing bulk copper properties to analyze how these properties affect burr height then, further cause filament issue during stamping process. The mechanism of filament formation will be discussed in this study.
4:40 PM Cancelled
Direct Bonding of Pure Al Die to Al Substrate with Ag Flake Paste: Cai-Fu Li1; Hao Zhang2; Zhi-Quan Liu3; Katsuaki Suganuma2; 1Sun Yat-sen University; 2Osaka University; 3Shenzhen Institutes of Advanced Technology, CAS
WBG semiconductor devices have the ability to operate at high temperatures, offer faster switching and reduce energy loss, and endure higher breakdown voltages. Ag particle sintering technology can realize high thermal and electrical conductivities at a much lower temperature than the melting point of Ag. The advantageous properties enable this method to be applied as an interconnection method for power electronics. Ag micro-flake based paste is applied to achieve die-attach sinter bonding for power electronic devices and demonstrate sufficiently high shear strength and electrical/thermal conductivity on Al substrate at a processing temperature of 250 degree centigrade. And the shear strength of the die-attach bonding will not decrease during the afterward high temperature storage process.