|About this Abstract
||2010 Electronic Materials Conference
||TMS 2010 Electronic Materials Conference
||N5, Breakdown Statistics and Nanowire Device Integration of Self-Assembled Nano Dielectrics
||Ruth Anne S. Schlitz, KunHo Yoon, Sara Renfrew, Lisa A. Fredin, Young-Geun Ha, Tobin J. Marks, Lincoln J. Lauhon
|On-Site Speaker (Planned)
||Ruth Anne S. Schlitz
Self-Assembled Nano Dielectrics (SANDs) are high-K molecular dielectrics grown by low-temperature solution processes. They offer great potential to enable high-performance electronics on unconventional substrates that are incompatible with the harsh conditions of conventional semiconductor processing. Furthermore, they have already been incorporated into a variety of devices incorporating both inorganic and organic components. However, if SANDs are to be scaled up successfully, they must have two characteristics: (1) they must be uniformly pinhole free on the scale of the device channel and (2) they must retain properties after device fabrication and processing. To this end, we present a failure analysis of SANDs, utilizing Weibull statistics to empirically determine a critical defect density in SANDs. Our quantitative failure analysis correlates synthesis conditions to the resultant Weibull slopes; typical β values found are between 3 and 15. By comparison, reported β values for other inorganic high-K dielectrics are on the same order, with reported values for many dielectrics typically less than 5, but as high as 14.4 for HfO2. Our studies of processing conditions qualitatively show the effects of post-synthesis processing on the SAND; while electron-beam lithography slightly degrades the performance of SAND, the resultant leakage current densities still compare favorably with inorganic dielectrics. Surprisingly, high-temperature anneals up to 400° C reduce the leakage current densities through the SAND and widen the range of processing conditions possible for a SAND device. We will discuss how the synthesis conditions of the SAND and subsequent processing of the parallel-plate capacitors used for the measurement influence the characteristic breakdown behavior. We also correlate these statistics with film morphology and capacitance. Finally, we present results from SAND integrated as a top gate dielectric in silicon nanowire transistors.