|About this Abstract
||2010 Electronic Materials Conference
||TMS 2010 Electronic Materials Conference
||P1, Fabrication of Individual Silicon Nanowire Radial Junction Solar Cells
||Chito Kendrick, S Eichfeld, Y Ke, X Weng, J Redwing, X Wang, T Mayer
|On-Site Speaker (Planned)
Radial p-n silicon nanowire (SiNW) solar cells are of interest as a potential pathway to increase the efficiency of crystalline silicon photovoltaics by reducing the junction length and surface reflectivity. Our studies have focused on the use of vapor-liquid-solid (VLS) growth technique to produce p-type silicon nanowires to act as the collection core of the solar cell. For the n-type shell layer, both low pressure chemical vapor deposition (LPCVD) and thermal diffusion of phosphorus have been investigated. The effect of process parameters and junction formation technique were investigated using single wire measurements which provides information on the diode characteristics and solar cell properties.
High aspect ratio p-type SiNW arrays (300 - 500 nm diameter) were initially grown on both patterned and unpatterned gold-coated (111) Si substrates by CVD using SiCl<SUB>4</SUB> as the source gas and B<SUB>2</SUB>H<SUB>6</SUB> as the p-type dopant source. Four point resistance measurements on individual p-type silicon nanowires indicated a nanowire resistivity of 0.01 Ω-cm for a SiCl<SUB>4</SUB>:B<SUB>2</SUB>H<SUB>6</SUB> ratio of 1x10<SUP>-4</SUP>. Prior to the junction fabrication, the gold tips were removed from the wires using Transene gold etchant for 40 minutes at a solution temperature of 40°C. Additional cleaning was done by thermally oxidizing the wires for 2 hours to produce a 150 nm thick SiO<SUB>2</SUB> layer, which was later removed before the n-type shell fabrication. The oxidation process also thins the wires to diameters that are needed for electrical measurements. The epitaxial re-growth of n-type Si shell layers on the Si nanowires was then investigated using SiH<SUB>4</SUB> as the source gas and PH<SUB>3</SUB> as the dopant. Highly conformal coatings were achieved on nanowires up to 25 μm in length. The microstructure of the Si shell layer changed from polycrystalline to single crystal as the deposition temperature was raised from 650°C to 950°C. For the thermal diffusion of the n-type shell, an annealing temperature of 1000°C was applied for 13 minutes with the introduction of POCl<sub>3</sub> dopant gas.
Electrical test structures were fabricated by aligning released SiNWs onto pre-patterned substrates via field-assisted assembly followed by selective KOH etching to remove part of the n-type shell layer before contact deposition. Preliminary current-voltage measurements of the radial p-n SiNWs diodes fabricated with re-grown Si shell layers demonstrate rectifying behavior with an ideality factor of 1.67 and low reverse leakage current.