||Erica Douglas, Ke Hung Chen, Chih Yang Chang, Lii-Cherng Leu, Chien-Fong Lo, Byunghwan Chu, Fan Ren, Stephen Pearton
Numerous studies have shown that InGaAs based metamorphic high electron mobility transistors (MHEMTs) have similar mean time to failure (MTTF) as that of InP based HEMTs, about 106 hours. However, InGaAs MHEMTs require a substantial burn-in process in order to stabilize device performance and eliminate infant mortality. Typically, drain current decreases while Ohmic contact resistance increases during electrical stress and stabilizes within 24-60 hours. In order to study the device reliability and failure mechanisms, both high temperature storage tests and DC stress tests were performed on MHEMTs. InAlAs/InGaAs MHEMTs, obtained from a vendor, were stressed for 36 hours at a drain voltage of 3V. Additional devices underwent a thermal storage test at 250°C for 36 hours. Transmission line method (TLM) structures were also stressed under similar conditions. The InAlAs/InGaAs MHEMTs employed a two finger Ti/Pt-based Schottky gate design with a length of 150 nm, a gate width of with 75 μm, and 1.2 μm spacing between both gate/drain and gate/source. The TLM patterns also present on the device chip employed 45 X 70 μm pads with gaps of 3, 6, 9, 12 and 15 μm. Under both DC and thermal stress conditions, the drain current decreased about 12.5%. Therefore, the devices suffered from an increase in parasitic resistance during stressing. The TLM patterns were stressed in order to examine the effect of the gate on the increase of the parasitic resistance and degradation of drain-source current.The total resistance of the TLM structures increased significantly with time in the first 12 hrs of thermal storage at 250°C, while the specific contact resistivity increases much more than sheet resistance. The gate characteristics of the thermal and DC stressed HEMTs showed significant degradation and gate current increased several orders in both forward and reverse bias conditions. This indicates that the contact between the Ohmic metal and semiconductor dominated the degradation during the thermal storage. Devices stressed under DC suffered from substantial gate sinking, in which the bottom Pt layer of the Pt/Ti/Pt/Au mushroom gate diffused into the InAlAs gate contact layer. The energy-dispersive x-ray spectroscopy (EDS) elemental analysis was used to analyze the Pt diffusion depth the gate region. The high current density, 1 × 10^5 A/cm2, flowing across the thin ohmic metal then across the metal semiconductor interface into the semiconductor the Ohmic metal caused the Ohmic metal to diffuse during the burn-in process. This caused the electromigration-induced voids and the formation of additional metal spikes at the edge of the Ohmic metal contact pads.