About this Abstract |
Meeting |
2023 TMS Annual Meeting & Exhibition
|
Symposium
|
Electronic Packaging and Interconnection
|
Presentation Title |
The Effect of Grain Boundary Type on Void Formation in a Through Silicon Via (TSV) |
Author(s) |
Armin Shashaani, Panthea Sepehrband |
On-Site Speaker (Planned) |
Armin Shashaani |
Abstract Scope |
In the 3D IC packaging technology, to achieve mechanical and electrical interconnection in the vertical direction, the chips are stacked by through-silicon-vias (TSV). As the fundamental structure of 3D IC packaging, TSV reliability plays a critical role in the service life of the chip. Void nucleation is considered the initial phase of various failure mechanisms in TSVs. Void nucleation is a complex process to study experimentally and there are conflicting views on the impact of crystallographic textures on void formation. To systematically study the effect of texture and to detect the initial phase of void nucleation, in-situ analysis of atomic arrangement is specifically designed bicrystals of copper (the main material of TSV) is conducted through Molecular Dynamics (MD) simulations. The effect of grain orientations and grain boundary characteristics on vacancy diffusion, which leads to void nucleation, is investigated, and the preferred crystallographic configurations for delaying void formation are defined. |
Proceedings Inclusion? |
Planned: |
Keywords |
Copper / Nickel / Cobalt, Thin Films and Interfaces, Electronic Materials |